One aspect of FPGA design and development I like the most is that it’s always changing. A decade ago, it was about deep RTL expertise, vendor-specific flows, and deterministic, long-term deployments, and our focus was on maximizing performance per watt for well-defined applications. Now, we are also expected to be fluent in system-level thinking and open hardware/software stacks, sometimes ready to deploy designs that may only be around for months before being re-targeted.
Part of that is down to the rise of System-on-Chips (SoCs) and System-on-Modules (SoMs), which combine programmable logic with hardened processors, memory, and high-speed interfaces in a single package or ready-to-use module. Rather than relying on separate CPUs and extensive board-level integration, they offer complete, application-ready systems so we can focus less on wiring up the basics and more on partitioning workloads, optimizing performance, and getting from concept to deployment faster.
Another is the adoption of FPGAs far beyond the traditional sectors like telecoms and defense where they were primarily deployed for high-throughput signal processing, protocol acceleration, and secure communications in tightly defined, long-lifecycle systems. Now they are accelerating workloads in data centers with low-latency pipelines, delivering deterministic, parallel processing for autonomous automotive systems, and handling neural network inference and real-time data processing in AI and machine learning.
As a result, we are all working differently to the way we did ten years ago. We are now expected to move between hardware description and high-level software frameworks, to integrate heterogeneous compute elements into cohesive systems, and to make design choices that balance performance, flexibility, and time-to-market. That means being comfortable with rapid prototyping, iterative refinement, and cross-disciplinary collaboration, often in teams where FPGA expertise is just one part of a broader skill set spanning embedded software, data science, and cloud deployment. The role has shifted from crafting isolated, fixed-function blocks to architecting adaptable platforms that can evolve alongside the applications they serve.
That is quite some change and it raises the question about where the next ten years will take us. What further advances in technology and the way we work with technology can we expect? What challenges will we be facing then compared with now? Are there any hints or clues in the journey we have been on over the last ten years?
A good place to start is a session I’m particularly looking forward to at the FPGA Horizons conference. In Microchip: The Golden Age of Computer Architecture: FPGA Edition, Microchip Technical Fellow Ted Speer will talk about why and how FPGAs are essential platforms in the evolving architecture landscape. In previous talks, he has highlighted the rise of RISC-V, the growing importance of software/hardware co-design, and the emergence of tools like Multi-Level Intermediate Representation (MLIR) and Circuit IR Compilers and Tools (CIRCT). Expect to hear about a future where compilers bridge the gap from high-level intent to heterogeneous hardware, and where open ecosystems enable faster iteration across the stack.
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