Articles in this issue
Streamlining the FPGA-SoC developer experience
Alexander Wirthmueller, MPSI Technologies
Implementing functional safety in hardware and software
Martin Kellerman, Microchip Technology Germany GmbH
Nikola Velinov, Green Hills Software
OSVVM: A better way to verify your VHDL designs
Jim Lewis, SynthWorks Design Inc
Developing a radiation-tolerant AI platform for space using AMD Versal adaptive SoCs
Pierre Maillard, Ph.D., AMD
FPGA strategies for PCB layouts:
Sparse vs Dense via breakouts
Tomas Chester, Chester Electronic Design
Leveraging FPGAs for deploying AI in small satellites
Dr James Murphy, Setanta Space Systems
A progressive approach to accelerating system-level verificationfor AMD Versal™ adaptive SoC designs
Adam Taylor, Adiuvo Engineering & Training
The Cyber Resilience Act
and what it means for FPGAs
Peter Trott, Microchip