Articles in this issue
Bridging FPGAs with the Vitis System Device Tree flow
A universal MIPI camera FMC PoC
Jeff Johnson, Opsero
Avoiding costly respins:
The case for pre-layout signal integrity
Dan Binnum, E3 Designers
Simplifying the requirements tracking journey
with the UVVM Requirements Traceability Matrix
Espen Tallaksen, EmLogic
From space to server:
Building resilient FPGAs and SoCs for every radiation environment
Dr. Pierre Maillard, AMD
Meet Hog
Introducing the open-source system for handling your HDL code on Git
Dr Francesco Gonnella, Birmingham University
Why PCB testing needs to shift left to the design stage
Matthew Holder, XJTAG
How logic folding boosts FPGA speeds and reduces footprints
Adam Taylor, Adiuvo Engineering & Training
GEAR UP: Post-quantum cryptography has moved from the classroom to the testbench
Matt Hilbert, FPGA Horizons Journal Editor