Articles in this issue
FPGA BGAs vs SoMs:
Strategies for a PCB layout
Tomas Chester, Chester Electronic Design Inc
Towards Versal 100G UDP filtering and arbitration for RDMA, Part1
John Mower, University of Washington
Jeff Johnson, Opsero
Why you really should be thinking about power and signal integrity
Dan Binnun, E3 Designers
Accelerating FPGA design using LLMs:
5G peak picker case study
Jie Lei, University of Technology, Sydney
How UVVM can result in faster and better FPGA verification
Espen Tallaksen, EmLogic
The Modular Infrared Molecules and Ices Sensor for ESA’s Comet Interceptor mission
Liam McSherry, University of Oxford
From chaos to clarity:
CDC methodologies for success
Dave Wallace, Blue Pearl Software
Embedded processing in FPGAs
Adam Taylor, Adiuvo Engineering & Training
“But it worked in simulation”
The pitfalls – and the promise – of functional verification
Matt Hilbert, FPGA Horizons Journal Editor