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Streamlining the FPGA-SoC developer experience

Streamlining the FPGA-SoC developer experience

Alexander Wirthmueller, Founder & Director, MPSI Technologies As FPGA-based System-on-Chips (SoCs) evolve, where the combination of programmable logic (PL) and multiple CPU cores make them suitable for embedded processing and Linux, a review of the tooling used...
OSVVM: A better way to verify your VHDL designs

OSVVM: A better way to verify your VHDL designs

Jim Lewis, VHDL Trainer & OSVVM Chief Architect, SynthWorks Design Inc Today’s FPGA designs continue to grow in size while schedules either stay the same or shrink. According to the 2024 Wilson Research Group FPGA functional verification trend report,...
FPGA strategies for PCB layouts: 

FPGA strategies for PCB layouts: 

Sparse vs Dense via breakouts Tomas Chester, Hardware Designer and Founder, Chester Electronic Design As semiconductor processes advance, FPGA packages have moved from spacious 1.0mm BGA pitches to denser pitches of 0.5mm and below, changing how engineers approach BGA...